TANAKA MAMORU

Tanaka Mamoru (Non-member) was born on 20 September 1948 in Kanagawa, Japan. He received the B.E, M.E amd Ph.D degrees in Electrical Engineering from Keio Univesity, Yokohama, Japan in the year 1972,1974 and 1981 recpectively. In 1974 he joined the Circuit Development Department, Computer Engineering Department of Nippon Electric Company (NEC) where he was engaged in design and development of NEC's LSI computers. He resigned from the company and entered in the graduate school of Keio Univesity in 1978. In April 1981, he became an Associate Professor with the Department of Electrical Electronics Engineering of Sophia Univesity, Tokyo, Japan. He is now a Professor of Sophia University. He has done research in analysis of a large scale of networks and architectures of new LSI computers, Data Mining, Machine Learning, Neural Networks and Circuit Analysis. He is now interested in the synthesis of Retina Chips by Cellular Neural Networks. He was an Associate Editor of the IEEE Transactions on Circuit and System. He is a fellow member of IEICE.